25 days old

Senior FPGA Accelerator Design Engineer

Samsung Semiconductor, Inc.
San Jose, CA 95002
  • Job Code
    120986529

Samsung Semiconductor, Inc.

Engineering - Software San Jose, California

Description
Position at Samsung Semiconductor, Inc.


JOB TITLE

Senior FPGA Accelerator Design Engineer

REQUISITION ID

DSA33131



OVERVIEW

Samsung Semiconductor, Inc. is a world leader in Memory, System LSI and LCD technologies. We are currently looking for an exceptional senior FPGA engineer to join our team in San Jose, CA.

The Memory Solutions Lab (MSL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, SRAM memory. MSL's vision is to solve key problems and optimize architecture solutions for Cloud & Data center environments. We are an integral part of Samsung's strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product road maps.

We are currently looking for a Senior FPGA Accelerator Engineer to join our team in San Jose, CA. The Candidate will be a key technical member of Memory Platform Lab. He or she will join a team of experts in researching and developing innovative domain specific FPGA/ASIC accelerator and system solution for data center/cloud computing, in memory database, and machine learning applications. The ideal candidate must have prior experience developing leading edge FPGA/ASIC accelerator solutions of IMDB and machine learning applications.

JOB RESPONSIBILITIES
  • Define domain specific FPGA/ASIC accelerator microarchitecture and system solution for data center/cloud computing, in memory database, and machine learning applications.
  • Develop FPGA architecture, design, RTL, verification, lab bring-up, lab test and validation of an FPGA prototype for domain specific applications
  • Documentation of architecture, design and IP specifications
  • Research, evaluate and integrate acquired hardware Intellectual Property (IP)
  • Assist software architects developing Linux/ Windows device driver, test and debug
  • Work with hardware/ software architects developing innovative FPGA prototypes, contribute to feasibility studies & developing solutions
  • Propose and execute on innovations in software and hardware architecture based on their benefits to large-scale applications
  • Drive and contribute memory and storage system performance modeling, and machine learning applications characterization.
  • Create innovative IP, publish at conferences, and generate whitepapers.

REQUIRED SKILLS
  • B.S., M.S., or Ph.D. in Computer Architecture, Electrical Engineering, Computer Science or related field.
  • Demonstrated ability with FPGA design tool flows, synthesis, timing analysis, partitioning, FPGA programming, bring up and testing
  • In-depth background in HDL development, Verilog coding, integration, synthesis, debug, simulation, test bench creation and debug using CAD tools (Synopsys, Mentor, Cadence, or FPGA tools)
  • Hands-on lab prototype set up, testing, measurement and debug of storage solutions on FPGAs Hands-on experience with hardware board bring-up, server system integration and software integration with FPGAs
  • Experience with evaluation and integration of 3rd party IP in an FPGA environment
  • Demonstrated expertise with FPGA design and synthesis tools, simulation tools, and scripting tools for test automation
  • Solid expertise in computer architecture, including experience with some of the following: server systems, data centers, processors, memory hierarchy, memory subsystems, storage.
  • Highly motivated with excellent verbal and written communication skills.
  • Track record of innovation and creativity in problem solving.
  • Comfortable working in a multinational environment and understands how to leverage cultural diversity

PREFERRED SKILLS
  • Good knowledge of C/C++, Python, Linux. Ability and willingness to code and debug hands-on when necessary.
  • Good understanding of memory and storage system.
  • Good knowledge of in memory database and Linux kernel/system software including MMU, File System internals, etc.
  • Good understanding of neural network accelerator architecture with GPU/FPGA etc., and deep learning infrastructure (Torch, Caffe, TensorFlow, etc.)
  • Good knowledge of classical machine learning, neural network, statistics and relevant mathematics.
  • Good ability to debug software, prototypes, algorithms, experiments.

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Samsung Semiconductor Inc (SSI), an equal opportunity employer, is a world leader in Memory, System LSI, and LCD technologies. Headquartered in San Jose, California, SSI is a wholly-owned U.S. subsidiary of Samsung Electronics Co., Ltd.- the second largest semiconductor manufacturer in the world and the industry's volume and technology leader in DRAM, NAND Flash, SSDs, mobile DRAM and graphics memory. It is one of the largest providers of system logic, imaging and LED lighting solutions, as well as providing advanced process design and manufacturing for fabless companies. Samsung Semiconductor, Inc. also has a research and innovation center with numerous labs providing product design and research in: logic, memory, image sensors, displays and mobile technologies. In addition, the company supports Samsung Display Company, the largest producer of LCD and OLED displays.
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Posted: 2020-06-21 Expires: 2020-07-22

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Senior FPGA Accelerator Design Engineer

Samsung Semiconductor, Inc.
San Jose, CA 95002

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